My Custom 8-Bit CPU

In the later half of my internship at AMD in 2019, I was struck by the Muse. I had just seen the Monster 6502, which is a 1-1 scale replica of the venerable 6502. The MOS6502 was released in 1975, and it powered much of what people remember about technology from the 80s. The NES, the Commodore 64, the BBC Micro, and more where powered with this chip. I was not alive to see the hayday of this chip, but I grew up reading the blogs of those who did. It was a marvel of a bygone age in a package I could grasp and maybe even recreate at home. I didn't have much experience then, just unfounded ambition and a handful of freshman EE classes.

I didn't know CAD tools, RTL, or even how to make a PCB. What I did know was how to draw transistor-level circuits on paper, just like in my classes. I started by sketching building blocks—registers, logic gates, and adders—and tested them in an online simulator, constantly modifying and discarding my paper designs.

As the circuits grew, simulating them became all at once became unwieldy, and I had to rely on abstraction. Soon, my higher-level design blocks existed only as a growing collection of paper schematics in a folder. It took about four weeks of spare-time work to create the first complete version, and another three months before I had a design I felt was truly solid.

Since I planned to build the final circuit by hand on a custom PCB, the name of the game was minimizing transistors. Every component added time, money, and another potential point of failure. This philosophy extended to the registers. I based my design on latches instead of flip-flops, which cut the transistor count nearly in half per register bit as you can seel below. This meant I couldn't read from and write to a register in the same clock cycle, but it was a tradeoff worth making when a single failed transistor could mean days of debugging.

The Arithmetic Logic Unit (ALU) was the largest block due to the XOR gates it contained. My first attempt at an XOR gate, built from standard AND/OR/NOT gates, used 22 transistors. This meant the adder circuit alone would require about 50 transistors per bit—for comparison, an entire register bit took only 16! Switching to a NAND/NOR implementation brought it down to 16 transistors. After tweaking Boolean equations, I saved another two. I was stuck there for weeks until a breakthrough on another part of the design gave me a new idea. I implemented the XOR function directly, using the inputs A and B and their inverted signals to drive four pairs of MOSFETs. This final design got the XOR gate down to a lean 12 transistors.

As the design progressed, I began grappling with the limitations of an 8-bit machine. I chose 8 bits not because it was ideal, but because I dreaded the time it would take to hand-assemble anything larger. Every transistor was precious. In my Presentation, you can see how I stretched simple operations over many clock cycles just to keep the data path simple. As the design matured, I did allow myself one big divergance from the style of the 6502: I used a ROM IC for the instruction decoder instead of building a diode array like the 6502 did. I didn't know how to perform logic reduction on a large scale, so this was the most practical solution available to me. You can see the evolution of the datapath in the two versions below.

As I considered the CPU's functionality, I realized an 8-bit address space, with its 256-byte limit, was too restrictive for a meaningful program. To solve this, I banked the memory to create a 16-bit address space. I also opened up a datapath to the ALU for immediate values, added status flags to accommodate branch instructions, and isolated the swap register, which simplified the micro-ops.

The resulting Instruction Set Architecture (ISA) had, by necessity, a small scope. With only 8 bits available for an entire instruction, there isn't much space for complexity. At the time, I didn't know about techniques like variable-length or multi-word instructions, so I focused on packing as much useful functionality as I could into that tiny footprint.

I think this was a great project for my personal development, even if it wasn't groundbreaking. My design, while using fewer transistors, doesn't really stand up to the 6502 in functionality; it lacked the addressing modes, instructions, and interrupts. But the goal was never to beat the digital designers of 1975; it was to learn by walking in their footsteps. This project gave me a reason to learn more and was the centerpiece of an interview that led to a job at TI. The full presentation is available here if you want to see what I was able to accomplish by working on a project outside my comfort zone.